1. Field of the Invention
The present invention is directed to the manufacture of integrated circuits. More specifically, but without limitation thereto, the present invention is directed to avoiding the diffusion of voids to vias in an integrated circuit.
2. Description of the Prior Art
Integrated circuit designs typically include electrical conductors such as metal lower metal levels formed in a top metal layer of the integrated circuit. Electrical connections between the electrical conductors in the top metal layer and lower level metal interconnect layers in the integrated circuit are generally made by forming vias between the electrical conductors in the top metal layer and electrical conductors in the lower level metal interconnect layers.